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ECED 3403 - Computer Architecture
3 Credit Hours
This course deals with controllers, processor instruction sets, and memory systems. The student will study design methods, implementation techniques, modelling techniques, and performance analysis. Reduced instruction set architectures (RISC), pipelining, pipeline hazards, and their implementation for modern high speed applications will be studied. The student project will require a team to design and implement (or simulate) a RISC architecture.

Prerequisites

ECED3204

Instructors

2024/2025 Winter:

2025/2026 Winter:

Course Schedule
8:00 AM
8:30 AM
9:00 AM
9:30 AM
10:00 AM
10:30 AM
11:00 AM
11:30 AM
12:00 PM
12:30 PM
1:00 PM
1:30 PM
2:00 PM
2:30 PM
3:00 PM
3:30 PM
4:00 PM
4:30 PM
5:00 PM
5:30 PM
6:00 PM
6:30 PM
7:00 PM
7:30 PM
8:00 PM
8:30 PM
9:00 PM
9:30 PM

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